1. Field of the Invention
The present invention generally relates to a method for manufacturing a semiconductor device package, and more particularly for manufacturing a semiconductor package of a center pad type device.
2. Description of the Related Arts
New packaging technologies have emerged to meet the integration density and operation speed requirements of newly developed semiconductor devices. The new packaging technology includes the Ball Grid Array (BGA) package, the Chip Size Package (CSP) and the Fine Pitch Ball Grid Array (FPBGA) package. While all of these packages have a smaller footprint than conventional plastic packages, the footprint of the CSP and FPBGA packages can be as small as the size of the semiconductor chip.
FPBGA packages 10 and 20 are described with reference to FIGS. 1 and 2. As shown in FIG. 1, a semiconductor chip 11 is attached to a tape wiring substrate 15. An elastomer 16 is interposed between semiconductor chip 11 and tape wiring substrate 15. Tape wiring substrate 15 includes a polyimide film 13 having top and bottom surfaces, beam leads 14 formed on the bottom surface of polyimide film 13, and terminal pads 4 which are extensions of beam leads 14. Multiple via holes 17, through which terminal pads 4 are exposed, are formed through polyimide film 13. Metal balls 19 are attached to terminal pads 4. Beam leads 14 are bonded to bonding pads 12 of semiconductor chip 11. As a result, semiconductor chip 11 electrically connects to external electronics (not shown) through bonding pads 12, beam leads 14, terminal pads 4, and metal balls 19. Bonding parts between bonding pads 12 and beam leads 14 are encapsulated with a plolymer resin 18.
The bonding pads of memory devices are typically arranged along the outer edges of the devices. The bonding pads of semiconductor chip 11 of FPBGA package 10 are arranged in this fashion.
To improve electrical performance and reduce the size of the chip, a center pad type memory device was created in which the bonding pads are disposed along a center line(s) of the device. The center pad type memory device requires a newly designed FPBGA package.
FPBGA package 20 of FIG. 2 is an example of the FPBGA package designed for the center pad type device. As with FPBGA package 10 of FIG. 1, a semiconductor chip 21 is attached to a tape wiring substrate 25. An elastomer 26 is interposed between semiconductor chip 21 and tape wiring substrate 25. Via holes 27 are formed through the tape wiring substrate 25. Beam leads 24a of tape wiring substrate 25 bond to bonding pads 22 of semiconductor chip 21. Metal balls 29 are attached to respective terminal pads 24b exposed through via holes 27. Although FPBGA package 20 looks similar to FPBGA package 10, FPBGA package 20 presents some technical problems not found in FPBGA package 10.
Encapsulation of edge encapsulation area 28a is performed by the same method as the encapsulation of FPBGA package 10. Before solder balls 29 are attached to terminal pads 24b, a cover film (not shown) is attached to the top surface of tape wiring substrate 25. Tape wiring substrate 25 and chip 21 are turned upside down such that the cover film is under tape wiring substrate 25. A liquid encapsulant is then dispensed on tape wiring substrate 25 along the perimeter of semiconductor chip 21 to encapsulate edge encapsulation area 28a. Encapsulation of a center encapsulation area 28b is performed after turning over the tape wiring substrate 25 and removing the cover film.
The encapsulation process of FPGBA package 20 is long and complicated, and, consequently, increases manufacturing costs. Because encapsulation area 28b may trap an air pocket and the void of the air pocket may result in a crack in the packaging, the encapsulation process decreases the FPGBA package's reliability.